OP_SRL_KR

[dpJudas]

While looking at some of the VM code I came across something I thinks looks like a bug, but would like to get that confirmed.

Notice the difference between OP_SLL_KR, SRL_KR and SRA_KR:

Code: Select all

	OP(SLL_KR):
		ASSERTD(a); ASSERTKD(B); ASSERTD(C);
		reg.d[a] = konstd[B] << reg.d[C];
		NEXTOP;

	OP(SRL_KR):
		ASSERTD(a); ASSERTKD(B); ASSERTD(C);
		reg.d[a] = (unsigned)konstd[B] >> C;
		NEXTOP;

	OP(SRA_KR):
		ASSERTD(a); ASSERTKD(B); ASSERTD(C);
		reg.d[a] = konstd[B] >> reg.d[C];
		NEXTOP;

Shouldn't it be reg.d for SRL_KR as well? It makes no sense to have an opcode that just assigns a compile time constant.

[_mental_]

Yes, it looks like a copy/paste from opcode with immediate operand.

[Graf Zahl]

This never caused problems with scripts misbehaving???

[Major Cooke]

I wonder what that represents in particular?

[Graf Zahl]

This opcode is for shifting an unsigned constant to the right by an amount of bits specified by a variable.

In DECORATE terms something like "1337 >>> b", which is admittedly something that's not being used frequently.